Senior Digital Fault Tolerance Engineer

4 days ago

Salem, Tamil Nadu, India beBeeDFT Full time ₹ 1,50,00,000 - ₹ 2,25,00,000
Job Opportunity

**Role Description:**

We are seeking a highly skilled Digital Fault Tolerance expert to join our team. The successful candidate will be responsible for developing and implementing DFT architectures with a focus on built-in self-test (MBIST) for advanced systems-on-chip (SoCs).

  • Develop and implement DFT architecture with a focus on MBIST for advanced SoCs.
  • Integrate MBIST IPs, generate test insertion and verification infrastructure.
  • Work on DFT planning, insertion, simulation, and pattern generation.
  • Perform ATPG and MBIST pattern generation and debug failures from silicon bring-up.
  • Collaborate with RTL, Physical Design, and Verification teams throughout the design cycle.
  • Support silicon bring-up and yield improvement activities post-silicon.
  • Ensure high coverage and test quality in scan and MBIST.

**Required Skills and Qualifications:**

  • Bachelor's or Master's degree in Electronics or related field.
  • Minimum 7+ years of hands-on experience in DFT with a strong focus on ATPG, SCAN and MBIST.
  • Proficient in tools such as Synopsys DFT Compiler, Tessent (Mentor), or equivalent.
  • Solid understanding of scan insertion, ATPG, boundary scan, and JTAG.
  • Experience with memory test algorithms, repair analysis, and pattern generation.
  • Familiarity with scripting languages (TCL, Perl, Python) for automation.
  • Strong analytical and problem-solving skills with the ability to work independently.

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