Analog Mixed Signal IP Verification Specialist

2 weeks ago


Bengaluru, Karnataka, India beBeeVerification Full time ₹ 15,00,000 - ₹ 20,00,000
System Verilog Verification Engineer

This is an exciting opportunity to work on the verification of complex Analog Mixed Signal IPs that are delivered to various SoCs.

Job Description:

The ideal candidate will have the ability to create feature test plans, verify IP features in RTL, gate-level and analog mixed signal simulations. They will also be responsible for creating methodology-based (UVM) verification testbenches and components from scratch for various IP features.

Key Responsibilities:

  • Create a feature test plan and verify IP features in RTL, gate-level and analog mixed signal simulations.
  • Develop methodology-based (UVM) verification testbenches and components from scratch for various IP features.
  • Ensure quality deliverables through regressions.
  • Verify coverage: code-coverage, functional coverage, assertions, to achieve 100% verification completeness.
  • Provide reviews and feedback to design/architecture teams.

Preferred Experience:

  • 14+ years of experience required.
  • Expertise in System Verilog, methodology-based testbench architectures such as UVM, and System Verilog assertions.
  • Expertise in code and functional coverage.
  • Excellent problem-solving and debugging skills.
  • Excellent communication skills.
  • Strong digital design knowledge and SoC design flow.
  • Knowledge on AMS designs (SERDES or Memory PHYs such as DDR, GDDR) and mixed-signal verification methodology is an added advantage.
  • UPF-based RTL low-power verification.
  • Knowledge on AMS designs (Memory PHYs such as DDR, GDDR, PLLs) and mixed-signal verification methodology is an added advantage.

Academic Credentials:

  • Bachelor's or Master's degree in ECE/EEE desired.


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