Principal Engineer

6 days ago


Pune, Maharashtra, India Mulya Technologies Full time

About the Company

Mulya Technologies enables tomorrow's future by accelerating the critical data communication at the heart of our digital world.

Job Summary:

As Senior Staff Engineer, you will be responsible for developing flows across all company departments and projects, including architecting methodologies and flows for an integrated, RTL-centric 'shift left' DFT environment.

Key Responsibilities:

  • Develop automated verification test bench and sequence creation for DFT IP.
  • Architect end-2-end verification solutions from static design checks, through formal and sequence-based verification.
  • Build IP/block and SoC level scan insertion flows and script ATPG retargeting procedures.

Requirements:

  • Engineer with 10+ years of experience in complex SoC designs in RTL, DFT, or FE capacity.
  • Good understanding in Verilog/VHDL and System Verilog.
  • Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs).

Compensation Package:

  • $180,000 - $220,000 per year.
  • Restricted Stock Units (RSUs)
  • Hybrid Working Model
  • Provisions to pursue advanced education
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

This role offers an exciting opportunity to work on cutting-edge technology and contribute to the growth of Mulya Technologies.



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