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Senior Verification Specialist
2 weeks ago
We are looking for a seasoned Verification Engineer to join our team and contribute to the development of innovative RISC-V processors and subsystems.
The ideal candidate will have 12+ years of experience in design verification and a strong understanding of computer architecture. They will be responsible for developing and executing verification plans, constructing testbenches, scoreboards, and stimulus generators, and implementing functional coverage models.
The successful candidate will also have experience with SystemVerilog verification development, testbench construction using UVM or analogous methodologies, and scoreboard and stimulus generator creation for complex units.
Additionally, they will have industry experience with CPU microarchitecture and/or coherent caching systems, as well as software development experience in compiled and interpreted languages.
As a key member of our team, the Verification Engineer will be responsible for unit or feature ownership throughout the project lifecycle, including post-silicon validation.
Key Responsibilities- Develop and execute verification plans for units and features
- Construct testbenches, scoreboards, and stimulus generators
- Implement functional coverage models
- Debug designs in simulation, prototyping platforms, and silicon
- 12+ years of experience in design verification
- Bachelor's or Master's degree in a related engineering field
- Strong domain knowledge of computer architecture
- SystemVerilog verification development experience
- Testbench construction using UVM or analogous methodologies
- Scoreboard and stimulus generator creation for complex units
- Industry experience with CPU microarchitecture and/or coherent caching systems
- Software development experience in compiled and interpreted languages
