Design Verification Expert
1 week ago
This role is an excellent opportunity for a skilled Senior Design Verification Engineer to drive the verification of complex IP blocks or SoC subsystems and contribute to leading verification efforts across multiple projects.
The ideal candidate will have a strong background in pre-silicon verification of complex IPs or SoCs and be capable of developing test plans, verification strategies, and coverage metrics based on design specifications.
- Lead the verification of complex IP blocks or SoC subsystems, ensuring high-quality results.
- Develop and maintain constrained-random and directed testbenches using SystemVerilog/UVM.
- Collaborate with architects, designers, and other verification engineers to identify and debug design issues.
- Develop and maintain verification infrastructure, scripts, and regression systems.
- Perform functional and code coverage analysis, driving closure.
- Provide technical guidance and mentorship to junior team members.
To excel in this position, you should have:
- A B.E./B.Tech or M.E./M.Tech degree in Electronics, Electrical, or Computer Engineering.
- 8–14 years of hands-on experience in ASIC/SoC verification.
- Strong expertise in SystemVerilog, UVM, and RTL simulation tools (e.g., VCS, Questa).
- Solid understanding of verification methodologies, functional coverage, and assertion-based verification.
- Experience in developing and maintaining testbenches from scratch.
- Strong debugging skills and familiarity with waveform viewers like Verdi or DVE.
- Good knowledge of scripting languages (Python, Perl, or TCL) for automation.
- Familiarity with version control and CI/CD systems.
Prior experience in formal verification or emulation, industry-standard protocols like PCIe, USB, DDR, AMBA (AXI/AHB/APB), and post-silicon bring-up and validation are highly valued.
This role offers opportunities for growth and professional development, as well as a chance to work with a talented team.
We encourage motivated and experienced candidates to apply.
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