Senior Chip Architect

1 week ago

Kottayam, Kerala, India beBeeDesign Full time ₹ 1,40,00,000 - ₹ 2,10,00,000
Job Title: Physical Design Engineer

Summary (50 words):

Develop and execute physical design strategies for Fullchip/Blocks, encompassing floorplanning, placement, budgeting, clock tree planning & analysis, scan re-ordering, clock tree synthesis, placement optimizations, routing, timing, and SI analysis/closure.

Responsibilities:
  • Manage all aspects of Physical Design for Fullchip/Blocks, including Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation.
  • Collaborate closely with the methodology team to resolve implementation challenges and provide inputs to enhance the Physical design flow.
  • Experience in design automation and proficiency in Unix/TCL/Perl is required.
  • Excellent communication and presentation skills are necessary, along with good interpersonal skills and problem-solving ability.
Required Skills and Qualifications:
  • 4+ years experience in ASIC physical design.
  • Experience with block implementation, extraction, timing, or full-chip designs.
  • Strong communication skills and strong hands-on TCL/Perl development skills are essential.
Benefits:

This role offers a dynamic work environment, opportunities for growth and professional development, and a competitive compensation package.

Others:

Applicants should have a passion for innovation and a commitment to delivering high-quality results under tight deadlines.

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