Visionary Semiconductor Innovator

1 week ago

Hyderabad, Telangana, India beBeeEngineer Full time ₹ 15,00,000 - ₹ 21,00,000
Senior Engineer for EDA Automation

Synopsys is a technology leader helping drive innovation in the Era of Pervasive Intelligence. Our technology underpins various applications, including self-driving cars and learning machines.

You are an experienced engineering professional with a strong foundation in VLSI concepts, CMOS circuit design, and EDA tools. With 2-3 years of hands-on experience in the semiconductor industry, you excel in dynamic environments that value innovation, collaboration, and continuous learning.

Key Responsibilities:

  • Develop and maintain scripts using TCL, Python, and Make to streamline EDA tool operations and design processes.
  • Perform advanced timing, power, and noise analysis on CMOS circuits, leveraging your understanding of setup/hold constraints and leakage concepts.
  • Contribute to standard cell library characterization, ensuring accurate modeling for signoff.
  • Collaborate with cross-functional teams to optimize Power, Performance, Area (PPA), and address Static Timing Analysis (STA) challenges.
  • Utilize EDA tools like VCS, Design Compiler, Primetime, and HSPICE/Primesim for verification, synthesis, and signoff activities.
  • Participate in root cause analysis of timing and power issues, implement innovative solutions, and document best practices.
  • Stay updated on the latest trends in AI/ML and explore their application in EDA tool flows and design optimization.

The Impact You Will Have:

  • Enhance product reliability by ensuring precise timing and power characterization.
  • Drive cross-functional collaboration, sharing insights and solutions that elevate team performance.
  • Reduce design cycle times and resource bottlenecks through scripting and workflow optimization.
  • Mentor junior engineers, fostering a culture of knowledge sharing and continuous improvement.

Requirements:

  • 2-3 years of experience in VLSI design, EDA tool flows, or related semiconductor engineering roles.
  • Proficiency in TCL, Python, and Make for scripting and automation.
  • Strong understanding of CMOS circuit fundamentals, including timing, power, and noise analysis.
  • Experience with cell library characterization methodologies and familiarity with library constructs.
  • Working knowledge of STA analysis, PPA trends, and basic understanding of Place & Route.
  • Hands-on experience with EDA tools: VCS, Design Compiler, Primetime, HSPICE/Primesim.

About Your Role:

You will join a vibrant team of R&D engineers focused on advancing chip characterization, timing, and power analysis.

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