
Senior Clock Design Manager
2 weeks ago
Job Description
As a highly skilled professional, you will lead a team of engineers in driving the development of clocking solutions for AMD's Adaptive-Embedded Computing products. You will be responsible for inventing and implementing original solutions to address challenging clock problems in complex SOCs.
The Global Clock team works closely with functional Architecture, Programmable fabric, Integration, and SW teams to craft and implement new clock solutions, including new architectures, Clock IPs, and development of new tools, flows & Methodology.
Key Responsibilities
- Lead floor-planning, placement, routing, custom clock tree design, and optimization.
- Expert knowledge and hands-on experience of the entire backend and adjacent flows, including synthesis, Floor-planning P&R, clocking, timing closure, power, and IO planning.
- Perform all aspects of design flow from feasibility analysis, logic synthesis, FP, place and route, FEV, power, timing, quality checks, and design closure.
- Collaborate with design, Physical design, IT/infrastructure teams to ensure successful CAD flow all the way from IP design to SoC/3DIC design.
- Developing Programmable global Clock distribution methodologies, optimizing Clock - Skew, Signal integrity, and power integrity issues for AMD's next generation of programmable product families.
- Large Scale Block to Block Clock timing analysis, within the Die & Die to Die Clock interposer crossing.
- Deep analysis of timing paths to identify and debug key issues.
- Collaborate with functional IP teams (RTL, Ckt, physical design, Full Chip Timing, Integration) during the implementation and qualification of a growing number of programmable Clock IPs.
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