Chief Memory Designer

2 weeks ago

Bengaluru, Karnataka, India beBeeMemoryLayoutEngineer Full time ₹ 1,00,00,000 - ₹ 2,00,00,000
Memory Layout Engineer Opportunity

We are seeking a highly skilled Memory Layout Engineer to join our team. This is an exciting opportunity to work on next-generation memory designs for AI, mobile, and high-performance computing chips.

The ideal candidate will have strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs.

Key Responsibilities:

  • Design full-custom layouts for memory components like SRAM, ROM, CAM, Register Files, or sense amplifiers.
  • Work closely with circuit designers to understand schematics and translate them into optimized layouts.
  • Floorplanning, transistor-level placement, routing, and matching to meet electrical and physical design constraints.
  • Run physical verification (DRC, LVS, ERC, antenna checks) using industry-standard tools.
  • Perform parasitic extraction (PEX) and assist in post-layout simulation.
  • Ensure layouts meet design rules for process technologies (e.g., 5nm, 7nm, 16nm, 28nm).
  • Implement design automation using SKILL, Python, or Tcl where applicable.
  • Work with cross-functional teams (circuit, verification, CAD) to meet project milestones.

Requirements:

  • Bachelor's degree in Electronics or Electrical Engineering.
  • 3 years of experience in custom layout design, preferably in memory design.
  • Strong understanding of CMOS layout techniques, matching, shielding, and electromigration.
  • Experience with:
    • Tools: Cadence Virtuoso, Calibre DRC/LVS, StarRC, ICC, QRC
    • Technologies: Advanced FinFET and planar nodes (28nm and below)
  • Deep understanding of design rules (DRC), LVS, and physical verification sign-off flows.
  • Excellent attention to detail, layout quality, and debugging skills.

Preferred Qualifications:

  • Experience in compiler-based memory generation or memory compilers.
  • Exposure to high-speed or low-power memory layout optimization techniques.
  • Experience working with foundry design kits (PDKs) and tape-out processes.
  • Scripting experience in SKILL or Python for layout automation and checks.

Why This Role Matters:

  • Be part of a highly skilled layout team with access to leading-edge nodes and tools.
  • Competitive compensation and long-term growth opportunities.

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