Digital Fault Tolerance Expert

1 day ago

Alleppey, Kerala, India beBeeDigitalFaultTolerance Full time ₹ 1,50,00,000 - ₹ 2,50,00,000
Job Title: Digital Fault Tolerance Expert

The Role

We are seeking an experienced Digital Fault Tolerance Expert to join our team. As a key member of the organization, you will be responsible for designing and implementing digital fault tolerance architectures with a focus on built-in self-test for advanced system-on-chips.

Your primary objectives will include integrating built-in self-test intellectual property, generating test insertion and verification infrastructure, and working on digital fault tolerance planning, insertion, simulation, and pattern generation.

You will also perform automatic test pattern generation and debug failures from silicon bring-up, collaborate with RTL, physical design, and verification teams throughout the design cycle, and support silicon bring-up and yield improvement activities post-silicon.

In addition, you will ensure high coverage and test quality in scan and built-in self-test.

Requirements

  • Bachelor's or Master's degree in Electronics or a related field is required.
  • A minimum of 7+ years of hands-on experience in DFT with a strong focus on ATPG, SCAN, and built-in self-test is necessary.
  • Familiarity with tools such as Synopsys DFT Compiler, Tessent (Mentor), or equivalent is required.
  • Solid understanding of scan insertion, ATPG, boundary scan, and JTAG is essential.
  • Experience with memory test algorithms, repair analysis, and pattern generation is desired.
  • Familiarity with scripting languages (TCL, Perl, Python) for automation is a plus.
  • Strong analytical and problem-solving skills with the ability to work independently are required.

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