Leading ASIC Physical Design Professional

Job Title: Senior Physical Design EngineerWe are seeking an experienced Senior Physical Design Engineer to join our team. This is a unique opportunity to work with top-level design professionals on cutting-edge projects.The ideal candidate should have expertise in top-level floor planning, placement, scan-chain-reordering, clock tree synthesis, timing...

ASIC RTL Design EngineerJob Description:Exp: 5 to 8 yrsLocation: HyderabadGood knowledge on the digital concepts and ASIC flowExperience in RTL coding is a must.Must have hands on experience with SoC design and integration.Experience in Verilog/System-Verilog is a must.knowledge of AMBA protocols - AXI, AHB, APBBasic knowledge on verificationUnderstanding of...

Job OverviewWe are seeking a highly skilled Senior Physical Design Specialist to lead our physical design team and drive the development of efficient physical design flows.The ideal candidate will have strong expertise in physical design flows and signoff methodologies, excellent technical and communication skills, and proven experience in leading small...

Senior VLSI Design Engineer Opportunity">We are seeking an experienced Senior VLSI Design Engineer to join our team. With a strong focus on growth and mentorship, this role offers a unique opportunity for professionals with 3-12 years of experience in synthesis, physical design, and static timing analysis (STA).">• Drive innovation and excellence in your...

Senior Digital Circuit Designer OpportunityTessolve is seeking a senior digital circuit designer to join their team in Bangalore.The ideal candidate will have a minimum of 5 years of experience in ASIC/IP Design, with expertise in RTL ASIC, CDC, Lint, Synthesis, and Spyglass tools.

**Job Opportunity for Static Timing Analysis Expert**We are seeking a highly skilled Static Timing Analysis (STA) and Place and Route (PNR) expert to lead complex subsystem activities, ensuring robust timing closure and physical implementation with a focus on power, performance, and area optimization.The successful candidate will develop and refine...

Key Responsibilities: Drive block-level and/or full-chip physical design from RTL to GDSII. Floorplanning, placement, clock tree synthesis (CTS), and routing. Work on static timing analysis (STA) and timing closure. Run and debug physical verification (LVS/DRC/ERC) and power integrity checks (IR Drop/EM). Collaborate with RTL, DFT, synthesis, verification,...

Job OverviewAs a physical design engineer, you will be responsible for implementing block-level physical design from RTL to GDSII or netlist to GDSII. This involves bringing together various engineering disciplines to deliver complex hardware designs.]

We are hiring for PHYSICAL DESIGN ENGINEERS to join our family in Kochi, India.To create designs that are of high quality, consistent and in line with the overall design vision of the project and customer needs.(1.) Key Responsibilities1. To work closely with stakeholders to understand and refine design requirements.2. To develop prototypes and...

Key Responsibilities: Develop and implement physical design solutions from RTL to GDSII.Plan, place, clock tree synthesize (CTS), and route complex circuits.Conduct static timing analysis (STA) and achieve timing closure.Run and debug physical verification checks (LVS/DRC/ERC) and power integrity assessments (IR Drop/EM).Collaborate with cross-functional...