ASIC RTL Design Engineer

Senior ASIC RTL EngineerThis position involves working on complex digital design projects.Requirement Name : ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols)Role : Senior Engineer / Technical Lead / Architect / Senior Architect Experience in the field of engineering is required. Candidate should have...

Senior ASIC RTL Design EngineerWe are seeking a seasoned Senior ASIC RTL Design Engineer to join our team. As an ideal candidate, you will have a strong background in designing and developing complex digital functions and algorithms.Job Responsibilities:Create detailed design specifications and develop RTL code based on system-level specifications using...

Key Responsibilities: Develop and execute verification test plans based on design specifications. Create constrained-random and directed testbenches using SystemVerilog/UVM. Develop functional coverage models and drive coverage closure. Debug simulation failures, analyze waveforms, and work with RTL designers to resolve issues. Perform block-level and/or...

Key Responsibilities:Drive block-level and/or full-chip physical design from RTL to GDSII.Floorplanning, placement, clock tree synthesis (CTS), and routing.Work on static timing analysis (STA) and timing closure.Run and debug physical verification (LVS/DRC/ERC) and power integrity checks (IR Drop/EM).Collaborate with RTL, DFT, synthesis, verification, and...

Key Responsibilities: Drive block-level and/or full-chip physical design from RTL to GDSII. Floorplanning, placement, clock tree synthesis (CTS), and routing. Work on static timing analysis (STA) and timing closure. Run and debug physical verification (LVS/DRC/ERC) and power integrity checks (IR Drop/EM). Collaborate with RTL, DFT, synthesis, verification,...

Job Title: DFT LeadThe primary role of the successful candidate will be to oversee and manage the design for test (DFT) team in creating and implementing high-quality test plans and strategies.Develop a comprehensive understanding of DFT concepts and techniques.Utilize scripting languages such as Perl and shell to implement scan insertion, ATPG, coverage...

Key Responsibilities:Define and implement DFT architecture for SoCs and IPs.Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG).Work with RTL designers to insert DFT logic and resolve DRC violations.Generate and validate test patterns using tools such as TetraMAX, FastScan, DFT Advisor, etc.Analyze and improve fault coverage and...

Senior Physical Design EngineerWe are seeking a seasoned Senior Physical Design Engineer to lead our team in the development of innovative and efficient physical designs.Key Responsibilities:Design and develop complex physical designs for various customers, with a focus on achieving optimal performance, area, and power targets.Develop and implement flow and...

Company DescriptionAt Desionics, we are a dedicated team of professionals committed to revolutionizing architectural design, structural and MEP engineering consultancy with cutting-edge technology and innovation. Established in 2006, Desionics has spent over 18 years laying a solid foundation in various sectors, tackling projects ranging from intricate...

Company DescriptionAt Desionics, we are a dedicated team of professionals committed to revolutionizing architectural design, structural and MEP engineering consultancy with cutting-edge technology and innovation. Established in 2006, Desionics has spent over 18 years laying a solid foundation in various sectors, tackling projects ranging from intricate...