ASIC RTL Design Engineer

Key Responsibilities: Drive block-level and/or full-chip physical design from RTL to GDSII. Floorplanning, placement, clock tree synthesis (CTS), and routing. Work on static timing analysis (STA) and timing closure. Run and debug physical verification (LVS/DRC/ERC) and power integrity checks (IR Drop/EM). Collaborate with RTL, DFT, synthesis, verification,...

Key Responsibilities:- Define and implement DFT architecture for SoCs and IPs.- Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG).- Work with RTL designers to insert DFT logic and resolve DRC violations.- Generate and validate test patterns using tools such as TetraMAX, FastScan, DFT Advisor, etc.- Analyze and improve fault...

Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG). Work with RTL designers to insert DFT logic and resolve DRC violations. Generate and validate test patterns using tools such as TetraMAX, FastScan, DFT Advisor, etc. Analyze and improve fault coverage...

Key Responsibilities:Define and implement DFT architecture for SoCs and IPs.Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG).Work with RTL designers to insert DFT logic and resolve DRC violations.Generate and validate test patterns using tools such as TetraMAX, FastScan, DFT Advisor, etc.Analyze and improve fault coverage and...

Individually capable to design moldDFM PreparationTeam leading capabilityShould have minimum 3 years of Automotive Mold design experienceKnowledge of Side cores and Lifters

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