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2 weeks ago
Our ideal candidate will be responsible for designing and supporting the RTL for various IP solutions, including PCIe/CXL/IDE/UALink. They will work closely with existing RTL to add new features and ensure customer configurations are clean during verification regressions.
- Design and support of the RTL for various IP solutions
- Work with existing RTL, add new features, and ensure customer configurations are clean during verification regressions
To succeed in this role, you should have a strong foundation in electrical/electronics/VLSI engineering and relevant work experience in RTL design.
- BE/BTech/ME/MTech in Electrical / Electronics / VLSI with 8-16 years of RTL design experience
- System Verilog experience and UVM based environment usage/debugging required
- PCIe/CXL/IDE experience necessary, along with prior complex protocol implementation experience
- IP development team experience an added advantage, scripting knowledge also beneficial
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