Product Development Specialist

2 weeks ago

Hyderabad Secunderabad Telangana, India beBeeProductEngineer Full time ₹ 15,00,000 - ₹ 20,00,000

Join our team as a Product Engineer and be part of the Customer Enablement and Success group in Hyderabad, India.

The ideal candidate will focus on FPGA & ACAP design methodologies, compilation flows, design closure ease-of-use, tools specification, validation, documentation, and key customers support. As a member of a highly seasoned Product Development Engineering team, you will work closely with several R&D teams, internal application design teams, and tier-1 customers to improve the user experience and productivity and enable the next generation of high performance computing designs across the UltraScale and Versal ACAP device families.

  • You will own a Vivado product area and become the future team champion to work on high impact projects and with key customers.
  • You will drive critical customer escalations to closure and contribute to new technologies rollout.
  • You will contribute to triaging reported issues in several Vivado product areas, such as design entry, NoC and IP design flows, compilation, and help engineering address them effectively.
  • You will actively explore innovative methodologies and their impact on flow and design practices for the new 7nm Versal ACAP family.
  • You will work closely with AMD Business Units (Data Center, Wired, Wireless, Emulation & Prototyping, Test Equipment) to improve their designs, products and customer experience.
  • You will develop and deliver training materials on new features and methodologies.
  • You will stay current with and propose the internal use of industry approaches, algorithms, and practices

Education and Experience Requirements 

A master's degree in Electrical Engineering or a similar technology area, with at least 8 years of relevant experience is required.

  • Critical Skills: Has excellent working knowledge of RTL-based design flows and expectations.
  • Product Knowledge: Has good working knowledge of the entire FPGA or ASIC design process and tool flow, with intermediate-to-advanced understanding in timing analysis and closure. Scripting experience (Tcl, Perl, Python) is desired.
  • Design Enablement: Has good understanding of design methodologies for system design, AXI protocol, network-on-chip, design closure.
  • Problem Solving: Ability to handle and solve complex system level issues.
  • Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear. Can report out to management in a concise and actionable manner.
  • Teamwork: Able to work with several teams across sites and domains with a positive attitude under variable workloads.

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