Digital Design Engineer

5 days ago

Mount Abu, Rajasthan, India beBeeVerification Full time ₹ 1,50,00,000 - ₹ 2,50,00,000
Job Description

The primary objective of this role is to ensure the development and verification of digital designs meet the highest standards.

Key Responsibilities:

  • Understanding business requirements and functional specifications of IPs, subsystems, and SOC.
  • Creating Verification Environment Architecture documents.
  • Reviewing and revising code to meet acceptance criteria.
  • Developing code in System Verilog, UVM, C for unit, subsystem, and SOC level verification.
  • Performing RTL simulations using Synopsys and Cadence simulators.
  • Debugging and resolving problems found by simulations.
  • Developing performance test plans and maintaining them.
  • Implementing performance verification flows, including monitoring, synchronization, reporting, and self-checking mechanisms.
  • Providing full reports of performance metrics and bottlenecks.
  • Tracking tickets and code releases using Bug Tracking tools and GIT.
  • Performing UPF-based Power Aware simulations.
  • Coding Assertion and Functional Coverage bins in SVA.
  • Code and Functional Coverage Closure.
  • Preparing and conducting reviews of Verification Sign-off documents to ensure SOC tape-out quality.

Requirements:

  • 7+ years of experience in design verification.
  • Strong understanding of System Verilog, UVM, and C programming languages.
  • Experience with RTL simulations using Synopsys and Cadence simulators.
  • Knowledge of performance verification flows and debugging techniques.

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