Senior ASIC/SoC Design Expert

6 days ago


Bengaluru, Karnataka, India Wipro Full time

We are seeking a seasoned Senior ASIC/SoC RTL Engineer to join our team in Bengaluru, Hyderabad, Pune, Noida, or Kochi. This is a great opportunity for someone with 4-15 years of experience to leverage their skills in SoC subsystem/IP design and lead projects from conception to delivery.

The ideal candidate will have expertise in SoC subsystem/IP design, IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, as well as a deep understanding of RTL quality checks (Lint, CDC) and synthesis. Familiarity with low power concepts and AMBA bus protocols (AXI, AHB, ATB, APB) is highly desirable.

We also expect the candidate to have hands-on experience with tools like Spyglass Lint/CDC, Synopsys DC, and Verdi/Xcellium. Additionally, knowledge of scripting languages like Make flow, Perl, shell, and Python is essential. Understanding of processor architecture and/or ARM debug architecture is a plus.

As a Senior ASIC/SoC RTL Engineer, you will be responsible for designing and developing high-quality digital circuits, debugging complex issues, and collaborating with cross-functional teams. Your excellent communication skills and ability to create/review design documents will make you an invaluable asset to our team.

This role offers a competitive salary range of ₹2,500,000 - ₹6,000,000 per annum, commensurate with experience. If you're looking for a challenging opportunity to grow your career, please apply now



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