Design Verification Manager
1 month ago
Job Summary:
Durus is seeking a highly skilled Design Verification Lead to join our team. As a key member of our verification team, you will be responsible for leading verification activities for complex SoC/IP designs from specification to tape-out.
Key Responsibilities:
- Develop comprehensive verification plans based on design specifications and requirements.
- Collaborate closely with design, architecture, and firmware teams to define verification strategies and methodologies.
- Create and maintain testbenches using SystemVerilog and UVM for functional verification.
- Implement and execute test cases, regression testing, and coverage analysis.
- Debug failures and work with design engineers to resolve issues.
- Guide and mentor junior engineers, providing technical direction and reviewing their work.
- Drive continuous improvement in verification processes, methodologies, and tools.
- Ensure timely delivery of high-quality verification results, meeting project deadlines.
- Track and report verification progress, status, and metrics to project stakeholders.
Key Skills:
- Strong expertise in SystemVerilog and UVM (Universal Verification Methodology).
- In-depth understanding of digital design and verification concepts, including clock domain crossing, power management, and reset strategies.
- Experience with verification planning, test case development, regression testing, and coverage analysis.
- Proficiency with EDA tools such as Cadence Xcelium, Synopsys VCS, or similar simulation tools.
- Familiarity with assertion-based verification (ABV) and formal verification techniques.
- Strong debugging skills using tools like Verdi or DVE.
- Experience with scripting languages (Python, Perl, TCL) for automation and productivity enhancements.
- Strong communication and leadership skills.
Preferred Qualifications:
- Previous experience as a Verification Lead on complex SoC or IP projects.
- Experience with PCIe, DDR, USB, or other high-speed protocols.
- Familiarity with Emulation/FPGA-based verification methodologies.
- Experience in mixed-signal design verification.
- Knowledge of C/C++ for embedded software/firmware development and verification.
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