Digital Test Architect

3 days ago

Hubli, Karnataka, India beBeeDft Full time ₹ 2,00,00,000 - ₹ 2,50,00,000

Technical Leader - DFT Architecture

Drive strategic architecture and planning for complex SoC/ASIC designs, ensuring world-class testability and manufacturability of silicon products. This leadership role involves mentoring junior engineers, collaborating with cross-functional teams, and overseeing end-to-end DFT flow from RTL to gate-level netlist and silicon bring-up.

Key Responsibilities:

  • Define and implement DFT strategy and architecture for multiple ASIC/SoC projects.
  • Implement and verify DFT features like scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan (IEEE 1149.1/1149.6), IJTAG (1687).
  • Manage the entire DFT flow from RTL to gate-level netlist and silicon bring-up.
  • Collaborate with RTL, STA, PD, and test engineering teams for seamless integration.
  • Perform pattern generation, fault simulation, and debug test coverage gaps.
  • Owning DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery.
  • Support silicon bring-up, test vector validation on ATE, and yield optimization.
  • Mentor and guide junior DFT engineers; conduct design reviews and training sessions.
  • Develop and maintain DFT automation scripts and infrastructure.

Required Skills and Qualifications:

  • B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design.
  • 7+ years of experience in DFT for complex ASIC or SoC designs.
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.
  • Hands-on experience with DFT tools such as Synopsys, Siemens EDA, Cadence/others.
  • Strong knowledge of RTL design, STA, and synthesis flows.
  • Proficient in scripting languages (Python, Perl, Tcl) for flow automation.
  • Deep understanding of silicon test challenges and test coverage improvement.
  • Strong leadership, team collaboration, and communication skills.

Benefits and Opportunities:

  • Drive DFT for high-performance, next-gen SoCs and ASICs.
  • Collaborate with top-tier engineers and global semiconductor leaders.
  • Competitive salary and fast-track growth opportunities.

Why This Role Matters:

  • Transforming complex designs into high-quality, reliable products that meet customer expectations.
  • Leading a talented team of engineers to achieve technical excellence.
  • Contribution to the development of cutting-edge semiconductor technologies.

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