Senior Verification Engineer

2 weeks ago

Bengaluru, Karnataka, India Analog Devices Full time
About the Role

We are seeking a highly skilled and motivated Senior Verification Engineer to join our DBU ASIC team. As a key member of our engineering team, you will be responsible for developing and driving real revenue growth for Analog Devices by working on the next generation of Intelligence at the Edge products.

The ideal candidate will have a strong background in digital processing subsystems, with experience in verification methodologies, testbench architecture development, and UVM testbench architecture development. You will work closely with geographically diverse teams, utilizing leading-edge verification methodologies to drive innovation and efficiency in our product development process.

Key Responsibilities
  • Develop and maintain complex microprocessor designs, neural nets, and high-speed peripherals using industry-standard verification methodologies.
  • Create and manage UVM testbench architectures, defining test plans, tests, and verification methodologies for block/subsystem and chip-level verification.
  • Work collaboratively with design teams to generate and review test plans, ensuring closure of code and functional coverage.
  • Determine correct functionality through collaboration with other verification team disciplines, such as emulation, FPGA, and firmware teams.
  • Innovate verification solutions to meet deliverable schedules, while staying up-to-date with state-of-the-art verification techniques like formal, emulation, portable stimulus, and virtual platforms.
Requirements
  • Bachelor's or Master's degree in Engineering (Electronic Engineering) or equivalent, with 8+ years of verification or related work experience.
  • Hands-on experience in developing, updating, and debugging Verilog, SV-UVM, SOC-level testbenches is mandatory.
  • Experience in closing verification of block/subsystem-level verification using industry-standard metrics like code and functional coverage is essential.
  • Strong knowledge of test-plan generation, coverage analysis, transaction-level modeling, pseudo, and constrained random techniques with System Verilog.
  • Indepth knowledge of SV-UVM and debugging of testbenches is required.
  • Awareness of assertion and formal knowledge is advantageous.
  • Familiarity with microprocessor cores like ARM, RISC-V, Tensilica, Neural Network, GPU Cores is desirable.
  • Proficiency in System Verilog, C/C++, System C, TCL/Python/shell-scripting is necessary.
  • Proven track record of adopting new technologies quickly, with good problem-solving skills.
  • Strong interpersonal, teamwork, and communication skills are required.
  • Self-motivation and enthusiasm are essential.
  • Knowledge of AMBA BUS protocols like AHB, APB, AXI is mandatory.
  • Familiarity with UART, SPI, I2C, I3C, NVM/OTP, E-fuse, Ethernet, Audio (I2S, TDM, SPDIF), DSP, USB, Image Processing, JTAG, Debug Trace is an added advantage.
  • GLS, UPF, Low Power Simulations knowledge is desirable.
  • Familiarity with different simulators is beneficial.
  • Matlab modelling skills are desirable.
  • Mentorship skills for fresh graduates and junior engineers are advantageous.
  • Technical management of large DV teams is a must.
  • A good working knowledge of different DV methodologies like PSS, formal, Emulation is desirable.
  • Ability to interact with diverse disciplines like FPGA, Software, Virtual Prototyping is required.
About Us

Analog Devices is a global leader in the design, manufacture, and marketing of analog, mixed-signal, and digital signal processing integrated circuits for use in a wide range of applications, including automotive, communications, industrial, medical, consumer electronics, and commercial aerospace.

Salary Range

The estimated annual salary for this position is $120,000 - $160,000, depending on qualifications and experience.

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