
Hardware Engineer for Quantum Revolution
7 days ago
As a Hardware engineer, you will work on the systems driving the quantum revolution and AI era.
Key Responsibilities
You will be responsible for designing high-bandwidth, low-latency interconnects and chip-to-chip integration into high-performance Systems.
- Develop different interconnect topologies driven by bandwidth, latency, and RAS requirements.
- Present proposed architectures in High-level design discussions.
- Collaborate with Verification, DFT, Physical design, FW, SW teams to develop features.
- Sign off pre-silicon designs meeting all functional, area, and timing goals.
- Participate in silicon bring-up and validation of hardware.
Education Requirements
A Master's Degree from a reputable University is required.
Technical Expertise Required
8+ years of relevant experience with expertise in:
- At least 1 generation of processor interconnect design delivery leadership.
- Expertise in SMP coherency.
- Experience in mesh, crossbar, and other on-chip interconnect topologies.
- Understanding of various snoop and data network protocols.
- Knowledge of latency & bandwidth requirements and implementation means.
- Working knowledge of queuing theory.
- numa/nuca architecture.
- Proficient in HDLs - VHDL / Verilog.
- Experience in High-speed logic design.
- Experience in working with verification, validation, physical design teams for design closure.
- Good understanding of Physical Design and collaboration with physical design team for floor planning, wire layer usage, and budgets.
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