High-Speed Connectivity Architect

2 days ago


Greater Hyderabad Area, India beBeeExpertise Full time ₹ 1,50,00,000 - ₹ 2,25,00,000
Job Title:

Senior Analog Director - PCIe Gen 7

  • Lead the development of next-generation connectivity solutions.
Key Responsibilities:

Architect and design high-speed SerDes technology for PCIe 7.0, focusing on data rates exceeding 128 GT/s.

Develop and integrate advanced optical interconnects and retimer solutions within Smart Cable Modules.

Define and specify mixed-signal SerDes PHY requirements, including transmitter, receiver, and clock recovery circuits.

Conduct analysis and simulation of high-speed channel performance, addressing signal integrity and power integrity.

Collaborate with cross-functional teams to ensure successful product development and bring-up.

Requirements:
  • Bachelor's degree in Electrical Engineering or Computer Engineering.
  • 15-25 years of experience in high-speed SerDes design and development.
  • Proven expertise in PCIe protocols, with direct experience in PCIe 4.0/5.0/6.0 design and a strong understanding of PCIe 7.0.
  • In-depth knowledge of mixed-signal design, including PAM4 signaling and equalization techniques.
Benefits:

Empower massive data throughput, energy-efficient links, and scalable system architectures.

Stay at the forefront of industry standards and emerging technologies.



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