Master Memory Interface Architect
13 hours ago
We are seeking an experienced Master Memory Interface Architect to join our team at Mulya Technologies. This role involves designing and optimizing memory systems, ensuring high-speed interface compatibility with memory controllers while optimizing signal integrity.
Job DescriptionAbout the Role:
- You will design and optimize physical layer interfaces for memory systems such as DDR, LPDDR, or HBM.
- Collaborate with customers to understand their requirements, provide technical support during product integration and deployment.
- Work closely with other teams to ensure seamless integration and functionality.
- Identify and mitigate risks associated with memory interfaces.
- Architect complex memory interface solutions to meet performance, power, and cost targets.
About You:
- You should have 13-17 years of experience in Memory PHY designs in lower (7nm and below) tech nodes.
- You should have worked in-depth in any one domain (Digital or Analog Design) in depth.
- You should have good knowledge about other domains, including RTL design, DV, Analog design, SI/PI.
- You should have worked on the architecture of PHYs and controllers.
Compensation Package:
$200,000 - $250,000 per year, depending on experience and qualifications.
Benefits:
- Competitive compensation package.
- Restricted Stock Units (RSUs).
- Hybrid working model.
- Provisions to pursue advanced education.
- Medical insurance.
- Wellness benefits.
- Office lunch & snacks facility.
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