Senior ASIC RTL SOC Design Lead
5 days ago
About Wipro:
We are a global information technology, consulting and business process services company.
Our Senior ASIC/SoC RTL Leads/Managers will work with us to deliver cutting-edge digital circuit solutions.
Role Overview:
This is a challenging role that requires expertise in SoC subsystem/IP design, IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.
Key responsibilities include in-depth knowledge on RTL quality checks (Lint, CDC), good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) and timing concepts.
You will also be required to have knowledge of one or more of the interface protocols: PCIe, DDR, Ethernet, I2C, UART, SPI.
Key Skills and Qualifications:
- Expertise in setting up and using tools like Spyglass Lint/CDC, Synopsys DC, Verdi/Xcellium.
- Understanding of scripting languages like Make flow, Perl, shell, python etc.
- Able to help and debug issues for multiple subsystems, create/review design documents for multiple subsystems and support physical design, verification, DFT and SW teams on design queries and reviews.
Wipro Offers:
We have multiple locations available for this position, including Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, Ahmedabad and more.
Salary: ₹1200000 per annum, based on qualifications and experience.
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