
Senior ASIC Design Verification Specialist
7 hours ago
We are seeking a talented ASIC Design Verification Engineer to join our team.
The ideal candidate will have a solid background in digital design and verification, with expertise in languages such as SystemVerilog and UVM. They will be responsible for developing and executing test plans to verify complex ASIC designs.
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field is required. Minimum 3 years of experience in ASIC design verification is also necessary.
The successful candidate will possess strong debugging and problem-solving skills, as well as excellent communication and teamwork abilities. In addition, they should have knowledge of functional, formal, GLS, power, and CPU verification methodologies.
Job Requirements:- Develop and execute test plans to verify complex ASIC designs.
- Utilize SystemVerilog (SV) and UVM methodologies for verification tasks.
- Perform functional, formal, GLS (Gate-Level Simulation), power, and CPU verification.
- Conduct IP and subsystem-level verification, ensuring robust verification of high-speed protocols.
- Experience with different models of a product.
- Familiarity with advanced verification tools and environments.
- Ability to handle multiple tasks and projects concurrently.
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