Senior ASIC Design Verification Engineer for High-Speed Protocols

1 day ago


Bengaluru, Karnataka, India Tessolve Full time
Job Overview

We are seeking a highly skilled ASIC Design Verification Engineer with extensive experience in various verification methodologies to join our team at Tessolve.

The ideal candidate will have a deep understanding of functional, formal, CPU, and GLS verification. This role requires expertise in SoC and IP level verification, particularly with high-speed protocols such as PCIe, USB, Ethernet, DDR, MIPI, SATA, SerDes, and others.

Responsibilities
  • Develop and execute comprehensive verification plans for ASIC designs.
  • Utilize various verification methodologies, including functional, formal, CPU, and GLS verification.
  • Conduct SoC level verification, ensuring integration and functionality of multiple IPs.
  • Implement IP verification strategies for high-speed protocols.
  • Collaborate with design and architecture teams to understand design specifications and requirements.
  • Create, maintain, and enhance testbenches and simulation environments.
  • Perform coverage analysis and closure to ensure all scenarios are tested.
  • Debug and resolve complex design and verification issues.
  • Document and present verification results to cross-functional teams.
  • Mentor junior engineers and contribute to the continuous improvement of verification processes.
Requirements
  • 5+ to 20+ years of experience in ASIC design verification.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • Proficient in SystemVerilog, UVM (Universal Verification Methodology), C/C++.
  • Strong understanding of OO (Object-Oriented) concepts.
  • Experience in writing assumptions, sequences, virtual sequences, tests, and coverage closures.
  • Knowledge of UVM factory and configurations, UVM callbacks.
  • Simulation tools: VCS, ModelSim, Questa, etc.
  • Formal verification tools: JasperGold, VC Formal, etc.
  • GLS tools: Synopsys, Cadence, or Mentor tools.
  • Debug tools: Verdi, DVE, SimVision, etc.
  • Coverage tools: Specman, Coverage Analyzer, etc.
Benefits

Tessolve offers a competitive salary range between $120,000 and $180,000 per annum, depending on experience. We provide a dynamic work environment that encourages collaboration, innovation, and professional growth.



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