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DFT Architect Engineer

2 weeks ago

Gandhinagar, Gujarat, India beBeeDigitalFaultTolerance Full time ₹ 20,00,000 - ₹ 25,00,000

Job Opportunity:

    We are seeking a seasoned engineer to develop and implement advanced digital fault tolerance architecture for complex ASIC/SoC designs.

   &nbspp;Key Responsibilities:

  • Design and implement DFT architecture for high-performance ASIC/SoC designs, focusing on innovation and efficiency
  • Collaborate with RTL and physical design teams to ensure seamless integration of DFT features, promoting cross-functional teamwork and communication
  • Generate and validate test patterns using ATPG tools for stuck-at, transition, and path delay faults, driving quality and accuracy in testing
  • Perform fault simulation and coverage analysis to optimize test quality, utilizing data-driven insights to inform decision-making
  • Support silicon bring-up and debug of test-related issues, ensuring prompt resolution and minimal downtime

    Requirements:

  • 3+ years of experience in DFT engineering, with a proven track record of success
  • Strong knowledge of digital circuit design and testing, with a focus on emerging technologies and innovations
  • Experience with ATPG tools and fault simulation, with a demonstrated ability to adapt and learn new skills
  • Good collaboration and communication skills, with the ability to work effectively with diverse stakeholders and teams

    Why This Role Matters:

    This role offers a unique opportunity to make a meaningful impact on the development of advanced digital systems, driving innovation and excellence in the field of DFT engineering.