
Principal DFT Engineer
4 days ago
We are seeking a highly skilled and experienced Principal DFT Engineer to lead our digital fault tolerance initiatives.
Key Responsibilities:
- Develop and implement comprehensive DFT strategies for complex ASIC and SoC designs.
- Collaborate with cross-functional teams to ensure seamless integration of DFT features across the design flow.
- Design, implement, and verify advanced DFT features such as scan insertion, compression, ATPG pattern generation, and fault grading.
- Mentor junior engineers and conduct design reviews to ensure high-quality results.
- Stay up-to-date with industry trends and emerging technologies to drive innovation in DFT.
Required Skills and Experience:
- B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design.
- At least 7 years of experience in DFT for complex ASIC or SoC designs.
- Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.
- Hands-on experience with DFT tools such as Synopsys, Siemens EDA, Cadence, and other leading-edge technologies.
- Strong knowledge of RTL design, STA, and synthesis flows.
- Proficient in scripting languages (Python, Perl, Tcl) for automation and flow optimization.
- Excellent leadership, communication, and teamwork skills.
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