ASIC Engineering Technical Lead

3 weeks ago


Bengaluru, Karnataka, India Cisco Full time
About Us

Cisco is a leading provider of networking hardware and software solutions. Our Common Hardware Group (CHG) is responsible for designing and developing the silicon, optics, and hardware platforms for our core Switching, Routing, and Wireless products.

Job Summary

We are seeking an experienced ASIC Design for Test Hardware Engineer to join our Silicon One development organization in Bangalore, India. As an ASIC Implementation Technical Lead, you will be responsible for implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of the designs.

Key Responsibilities
  • Implement DFT features that support ATE, in-system test, debug, and diagnostics needs of the designs.
  • Develop innovative DFT IP in collaboration with multi-functional teams and play a key role in full chip design integration with testability features coordinated in the RTL.
  • Work closely with design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post-silicon validation flows.
  • Participate in the creation of innovative hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies.
Requirements
  • Bachelor's or Master's Degree in Electrical or Computer Engineering required with at least 10 years of experience.
  • Knowledge of the latest innovative trends in DFT, test, and silicon engineering.
  • Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
  • Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime.
  • Verification skills include System Verilog Logic Equivalency checking and validating the Test-timing of the design.
Preferred Skills
  • Verilog design experience – developing custom DFT logic & IP integration; familiarity with functional verification.
  • DFT CAD development – Test Architecture, Methodology, and Infrastructure.
  • Test Static Timing Analysis.
  • Post-silicon validation using DFT patterns.


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