
Low Power Design Engineer
3 days ago
Our organization is shaping the data infrastructure that connects our world.
Our innovative technology enables new possibilities in enterprise, cloud, AI, automotive, and carrier architectures.
We offer a place to thrive, learn, and lead for those seeking purposeful and enduring innovation.
Key responsibilities:
- Work on digital design for ASICs, Physical Implementation, Power Supply integrity checks Low Power design & Signoff
- Contribute to SoC design cycles of ASICs, from Architecture definition to end-to-end design/Implementation/Signoff
- Collaborate with cross-functional teams including RTL design, verification, and DFT to optimize power.
- Perform floorplanning, placement, clock tree synthesis, routing, and physical verification.
Requirements:
- Bachelor's or Master's degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience.
- Exposure on ASIC Physical implementation, Layout and Semiconductor device/process through previous work/intern experience or course work.
- Experience in power analysis, estimation, and optimization flow.
- Understanding of Physical Design and EM/IR flow
- Expertise in Tcl and PERL.
- Detail oriented, self-motivated team worker, good verbal, and written communication skills.
- Strong Digital Design concepts and debugging skills.
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