
Senior Low Power Digital Circuit Designer
2 days ago
This position requires a highly skilled engineer to design and develop cutting-edge digital circuits. Key responsibilities include designing and optimizing low power RTL designs, developing and implementing microarchitecture and RTL optimization techniques, and collaborating with cross-functional teams to ensure successful project execution.
- To be successful in this role, you will need 5+ years of experience in low power RTL design and microarchitecture, proficiency in Verilog and ASIC design tools, strong knowledge of power estimation tools and scripting languages, experience with hardware architecture exploration and performance modelling, and prior experience in Machine learning/Artificial Intelligence domain and/or DRAM Memory controllers is a plus.
The ideal candidate will have expertise in low power RTL design, microarchitecture, synthesis, timing closure, low power estimation, and optimization of microarchitecture and RTL for area and power reduction. Additionally, the candidate should have experience with arithmetic units, floating point datapath design, ASIC design tools such as VCS, Verdi, Design Compiler, power estimation tools like Spyglass, PTPX, scripting languages Shell, Perl, Python, and C language.
We offer a competitive salary and benefits package, as well as opportunities for professional growth and development.
The selected candidate will work closely with our team to deliver high-quality results and meet deadlines.
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