Senior Verification Engineer

2 weeks ago


Bengaluru, Karnataka, India Cadence Design Systems, Inc. Full time

About the Role

We are seeking a skilled Senior Verification Engineer to join our Front-End Verification team at Cadence Design Systems, Inc.

Key Responsibilities

  • Partner with worldwide customers to provide front-end verification services from RTLDV to Post Silicon Validation.
  • Work closely with customers to understand product requirements and involve in system architecture discussions.
  • Define DV methodologies to fulfill customer requirements.
  • Acquire both breadth and depth of technical knowledge, and demonstrate expertise by authoring high-impact knowledge content.

Requirements

  • Bachelor's Degree in Electrical / Electronics / Electronics and Communication / VLSI Engineering with 4 years of related experience.
  • OR Masters with 4 years of related experience.
  • OR PhD with 3 years of related experience.
  • Experience in Processor-based full chip verification / IP Verification.
  • Knowledge of Verilog/System Verilog, digital simulation, and debug.
  • Knowledge of HS/LS Protocols / Processor-based SOC architecture and digital design fundamentals.
  • Skilled in many aspects of digital verification, including constrained random verification process, functional coverage, code coverage, assertion methodology / formal / Power Aware Simulations / GLS.

About Us

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise.

We apply our underlying Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality.



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