ASIC SOC RTL Design Lead
3 days ago
Hi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics.❖ Engineering 10+ years of ASIC SOC RTL (Micro-architecture) experience.❖ ARM Processor Integration Preferably M55 is a Must.❖ Strong understanding of design concepts.❖ ASIC flow Understanding of SDC Understanding STA reports.❖ Understanding of CDC logic Knowledge of lint rules and exceptions.❖ Design and use of block level simulations to bring up IP.❖ Knowledge of AMBA buses and when to use them.❖ Knowledge on common processor architectures (ARM, RiscV).❖ FPGA experience includes part selection, pin assignment, timing constraints, synthesis, and debug of design in the FPGA.❖ Relevant tool experience such as: Socrates, Core Consultant in addition to standard simulation tools (xcellium, vcs, etc) JTAG debugging experience (Coresight, Lauterbach, etc).❖ Low power design techniques / UPF As an RTL Engineer, Candidate will be responsible to work at IP, Subsystem, or SoC-related tasks.Responsibilities:❖ Collaborate with architects, pre- and post-silicon verification teams to meet deadlines.❖ Coordinate with customer leads, ensuring all deliverables and timelines are met.If this opportunity interests you—or if you know someone suitable—please send your updated resume to: 📧 maruthiprasad.e@eximietas.design.Referrals are highly appreciated.Best regards,Maruthy PrasaadAssociate VLSI Manager - Talent Acquisition | VisakhapatnamEximietas Designmaruthiprasad.e@eximietas.design+91 8088969910.
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ASIC SOC RTL Design Lead
2 days ago
bangalore, India Eximietas Design Full timeHi All, Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. We are Hiring: ASIC SOC RTL Design Leads/Architect. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or...
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ASIC SOC RTL Design Lead
3 days ago
bangalore, India Eximietas Design Full timeHi All, Greetings' from Eximietas Design....! We are Hiring ASIC SOC RTL Design Engineer/Leads. Job Title: ASIC SOC RTL Design Engineer/Leads ..! Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Eximietas Design is seeking an experienced and highly...
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ASIC SOC RTL Design Lead
3 days ago
bangalore, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
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Lead ASIC SOC RTL Designer
1 day ago
bangalore, India beBeeDesign Full timeKey Roles and Responsibilities:Job SummaryOur organization is seeking an experienced ASIC SOC RTL Design Lead to join our team. As a lead, you will play a key role in the design, development, and implementation of ASIC SOC RTL.Key ResponsibilitiesCollaborate with architects and verification teams to ensure seamless integration of designs.Coordinate with...
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Senior ASIC SOC RTL Design Professional
1 week ago
bangalore, India beBeeDesignLead Full timeJob OverviewWe are seeking an experienced ASIC SOC RTL Design Lead to join our organization. As a key member of our VLSI team, you will be responsible for leading complex design projects from concept to delivery.Main Responsibilities:Collaborate with architects and verification teams to meet project deadlines.Coordinate with customer leads, ensuring all...
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ASIC SOC RTL Design Architect
2 days ago
bangalore, India Eximietas Design Full timeHi All, Eximietas Design Hiring Senior RTL Design (Micro-architecture ) Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. ❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering 10+ years of...
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ASIC SOC RTL Design Architect
3 days ago
bangalore, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design (Micro-architecture) Architects / Sr. Manager.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics.❖ Engineering 10+ years of ASIC SOC...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: - Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. - Own design bring-up, block/subsystem integration, and close on...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore Urban, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore Urban, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. Own design bring-up, block/subsystem integration, and close on timing,...
