ASIC SOC RTL Design Lead
2 days ago
Hi All, Greetings' from Eximietas Design.... We are Hiring ASIC SOC RTL Design Engineer/Leads. Job Title: ASIC SOC RTL Design Engineer/Leads .. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Eximietas Design is seeking an experienced and highly skilled ASIC SOC RTL Design to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop microarchitecture specifications for complex SoC designs. Lead RTL design and implementation using Verilog/SystemVerilog, ensuring optimal performance, power, and area (PPA). Collaborate with system architects, verification teams, and physical design teams to ensure successful project execution. Perform design trade-off analysis to meet functional, performance, and power requirements. Develop and implement design methodologies to improve efficiency and quality. Mentor and guide junior engineers, fostering a culture of innovation and excellence. Participate in design reviews, provide technical leadership, and ensure adherence to project timelines. Qualifications: 10+ years of hands-on experience in RTL design and microarchitecture development. Strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis . Proficiency in microarchitecture design for complex SoCs, including pipelining, caching, and memory subsystems . Experience with low-power design techniques (e.g., clock gating, power gating, multi-Vt optimization). Familiarity with advanced process nodes and their specific challenges (e.g., finFET, multi-patterning). Strong scripting skills in Tcl, Python, or Perl for automation and flow development. Excellent problem-solving skills and attention to detail. Strong communication and leadership skills. What We Offer: Opportunity to work on cutting-edge semiconductor designs and innovative technologies. Collaborative and inclusive work environment. Competitive compensation and benefits package. Professional growth and development opportunities. Interested? Please share your updated resume with us at: Referrals are greatly appreciated—please feel free to forward this within your network... Best regards, Maruthy Prasaad Associate VLSI Manager - Talent Acquisition | Visakhapatnam Eximietas Design .
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ASIC SOC RTL Design Lead
2 days ago
bangalore, India Eximietas Design Full timeHi All, Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. We are Hiring: ASIC SOC RTL Design Leads/Architect. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or...
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ASIC SOC RTL Design Lead
3 days ago
bangalore, India Eximietas Design Full timeHi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already...
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ASIC SOC RTL Design Lead
3 days ago
bangalore, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
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Lead ASIC SOC RTL Designer
20 hours ago
bangalore, India beBeeDesign Full timeKey Roles and Responsibilities:Job SummaryOur organization is seeking an experienced ASIC SOC RTL Design Lead to join our team. As a lead, you will play a key role in the design, development, and implementation of ASIC SOC RTL.Key ResponsibilitiesCollaborate with architects and verification teams to ensure seamless integration of designs.Coordinate with...
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Senior ASIC SOC RTL Design Professional
1 week ago
bangalore, India beBeeDesignLead Full timeJob OverviewWe are seeking an experienced ASIC SOC RTL Design Lead to join our organization. As a key member of our VLSI team, you will be responsible for leading complex design projects from concept to delivery.Main Responsibilities:Collaborate with architects and verification teams to meet project deadlines.Coordinate with customer leads, ensuring all...
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ASIC SOC RTL Design Architect
2 days ago
bangalore, India Eximietas Design Full timeHi All, Eximietas Design Hiring Senior RTL Design (Micro-architecture ) Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. ❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering 10+ years of...
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ASIC SOC RTL Design Architect
3 days ago
bangalore, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior RTL Design (Micro-architecture) Architects / Sr. Manager.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics.❖ Engineering 10+ years of ASIC SOC...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: - Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. - Own design bring-up, block/subsystem integration, and close on...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore Urban, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...
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SeniorPrincipal ASIC RTL Design Engineer
3 weeks ago
Bangalore Urban, India Proxelera Full timeSummary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. Own design bring-up, block/subsystem integration, and close on timing,...
