CPU Core Feature Verification and Debug Engineer

2 weeks ago

bangalore, India Tenstorrent Full time

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

CPU Core Feature Verification and Debug Engineer

Role
CPU core level feature / testplan verification engineer responsible for ISA and microarchitectural verification
Responsibilities
Functional verification with emphasis on core level testplanning, stimulus development and regression debug for simulation and emulation regressions
Understand ISA and microarchitectural specifications for the Core and create comprehensive testplans
Hands-on debug for core level failures. Propose and implement stimulus enhancements and debug capability improvements for core, cluster and chip level testbench environments
Develop architectural and microarchitectural coverage for core features and create stimulus for closing coverage in a timely manner
Support design deployment across simulation and emulation platforms
Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain
Work with design, test and post silicon validation teams to ensure high quality delivery of the entire CPU core / cluster

Experience And Qualifications
BS/MS/PhD in EE/ECE/CE/CS with 4-15 years of experience
Strong background and experience with high performance OOO CPU microarchitecture
Experience and understanding of one or more ISAs - x86, ARM or RISCV
Experience debugging RTL and DV in a simulation environment, proficient at waveform and log file based debug
Experienced with assembly, C/C++ and UVM based stimulus generation targeting both ISA and microarchitectural scenarios
Familiar with simulation, formal and emulation environments
Hands-on with scripting (Python, PERL)
Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator)
Strong problem solving and debug skills across various levels of design hierarchies
Locations: Bangalore, India

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

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