CPU / Processor Verification

2 days ago

Bangalore Rural Bengaluru, India Aritrak Technologies Full time ₹ 12,00,000 - ₹ 24,00,000 per year

Experience Required

8-15 Years in CPU/SoC design verification

Key Responsibilities

Verification Strategy & Planning

  • Develop comprehensive verification plans and strategies for RISC-V CPU cores (in-order and out-of-order pipelines)
  • Define coverage metrics and create detailed test plans for microarchitectural features
  • Drive verification closure through coverage analysis and corner case identification

Test Development & Execution

  • Design and implement constrained random test benches using SystemVerilog/UVM
  • Develop directed tests for critical CPU features: pipeline stages, branch prediction, cache coherency, memory management unit (MMU), and interrupt handling
  • Create assembly-level tests targeting RISC-V ISA compliance (RV32/RV64, extensions: M, A, F, D, C, V)
  • Build and maintain regression test suites with automated checking mechanisms

Debug & Root Cause Analysis

  • Debug complex functional and performance issues in CPU RTL designs
  • Perform waveform analysis and work closely with design teams to identify and resolve bugs
  • Track and manage bug reports through resolution and silicon correlation

Coverage & Quality Metrics

  • Implement functional coverage models for CPU microarchitecture
  • Achieve code coverage targets (line, toggle, FSM, assertion coverage)
  • Drive coverage closure activities and identify verification gaps

Methodology & Tools

  • Build and enhance verification infrastructure using industry-standard tools
  • Develop reusable verification components and methodology improvements
  • Mentor junior engineers on verification best practices

Required Qualifications

Technical Skills

  • Strong expertise in CPU microarchitecture (pipelines, caches, branch prediction, speculation, out-of-order execution)
  • Deep knowledge of RISC-V ISA specifications and extensions (RV32/RV64, M/A/F/D/C/V)
  • Advanced proficiency in SystemVerilog, UVM methodology, and assertion-based verification (SVA)
  • Experience with formal verification tools and techniques
  • Hands-on with industry-standard EDA tools (VCS, Verdi, Questa, IUS/Xcelium)
  • Solid understanding of cache coherency protocols (MESI/MOESI) and interconnect fabrics
  • Knowledge of memory subsystems, MMU/TLB, and virtual memory concepts

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