CPU Verification Engineer

24 hours ago

Bangalore, India ACL Digital Full time

CPU Verification Engineers

Experience : 4+ years

Location : Bangalore & Hyderabad

We are seeking a skilled and motivated CPU Verification Engineer to join our microprocessor verification team. In this role, you will contribute to the verification of Super scalar, high-performance, low-power CPU cores by developing scalable testbenches, driving complex test scenarios, and ensuring full functional coverage and quality sign-off.

Experience with RISC-V instruction set will be an added advantage

Key Responsibilities:

· Develop and maintain UVM-based testbenches for verifying CPU cores and subsystems

· Write directed and random test cases to verify micro architectural features such as pipelines, ALUs, branch prediction, caches, MMUs, etc.

· Drive functional and code coverage closure

· Debug failures using waveform tools, logs, and simulation dumps

· Collaborate with architecture, RTL design, performance, and formal verification teams

· Define and implement verification plans, test strategies, and regressions

· Participate in specification reviews, microarchitecture discussions, and design quality assessments

· Support post-silicon validation and bring-up teams when needed

Required Skills:

· Strong hands-on experience with SystemVerilog and UVM methodology

· Deep understanding of CPU microarchitecture (pipeline, out-of-order execution, caches, TLBs, memory hierarchy)

. Write directed and random test cases to verify micro architectural features such as pipelines (fetch, issue, decode), ALUs/LSU/FPU(execution units), branch prediction, caches, MMUs, etc.

· Expertise in RTL simulation and debugging tools (VCS, ModelSim, Verdi, DVE, etc.)

· Familiarity with scripting languages like Python, Perl, or shell for automation

· Good knowledge of functional coverage and assertion-based verification

· Exposure to cache coherency, virtual memory systems, or multi-core architectures is a plus

· Experience with formal verification, emulation, or post-silicon debug is a bonus

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