Senior Verification Strategist

7 days ago

tiruppur, India beBeeVerification Full time

Job Title: Senior Design Verification LeadJob Summary:We seek an experienced Verification Engineer to lead our SoC Design Verification efforts. As a Senior Design Verification Lead, you will be responsible for ensuring the successful execution of verification plans.You will develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for complex projects involving high-speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) and high-speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM).You will conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF.You will collaborate closely with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, to ensure alignment and seamless integration of verification efforts.You will analyze and implement System Verilog assertions and functional coverage (code, toggle, functional) to ensure thorough verification of design functionality.You will provide mentorship and technical guidance to junior verification engineers, helping to elevate team performance.You will lead and manage a dynamic team of verification engineers, fostering a collaborative and innovative work environment.You will ensure that all verification signoff criteria are met, with clear and comprehensive documentation.You will demonstrate strong dedication, work ethic, and commitment to meeting project goals and deadlines.You will uphold quality standards and implement best test practices, contributing to continuous improvements in verification methodologies.You will work with verification tools from Synopsys and Cadence, including VCS and Xsim.You will integrate third-party VIPs (Verification IP) from Synopsys and Cadence to enhance verification coverage.Required Skills and Qualifications:Strong expertise in digital design verification.Experience with System Verilog, UVM, and assertion-based verification.Proficiency in tool flows from Synopsys and Cadence.Familiarity with gate-level simulations and power-aware verification techniques.Excellent collaboration and leadership skills.Mentorship and training experience preferred.Benefits:This role offers a competitive compensation package, comprehensive benefits, and opportunities for career growth and professional development.What We Offer:In addition to the above, we offer a dynamic work environment, flexible working arrangements, and a commitment to diversity, equity, and inclusion.About Us:We are a global technology leader dedicated to delivering innovative solutions that transform industries and improve lives.

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