Staff/Sr. Staff System IP Design Verification Engineer

6 hours ago


bangalore, India Tenstorrent Full time

We're looking for a passionate and hands-on RISC-V System IP DV Engineer to architect, develop, and evolve world-class verification infrastructure for System IPs (interrupt controllers, IOMMU, power management, DFD etc) that will be integrated in high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on.


This role is hybrid, based out of Bangalore.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting


Who You Are

  • You bring domain understanding of memory management at core/system level, concepts like virtual/physical memory, page tables etc
  • You thrive in building robust verification environments using SystemVerilog and UVM, and optionally C++, and can define and drive verification plans independently.
  • You have a strong grasp of stimulus planning, checker development, debug techniques, and coverage closure for verifying complex hardware subsystems.
  • You’re comfortable working on features that span multiple IPs and can devise plans to verify them at IP, subsystem and fullchip levels.

What We Need

  • A Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
  • 7 - 15 Years of Strong experience with System Verilog and UVM-based verification.
  • Proven ability to drive IP level and subsystem level DV projects.
  • Familiarity with core MMU or SMMU/IOMMU, bus protocols like AXI.

What You Will Learn

  • Owning a large scope with a small focused team.
  • How to structure and deliver a configurable IP to SoCs with seamless integration in mind.
  • How IOMMU can be integrated in a SoC, collaborating closely with RTL designers, architects etc.
  • Building reusable verification components, coverage models, and checkers that scale across multiple abstraction layers.



  • Bangalore, India Tenstorrent Full time

    We're looking for a passionate and hands-on RISC-V System IP DV Engineer to architect, develop, and evolve world-class verification infrastructure for System IPs (interrupt controllers, IOMMU, power management, DFD etc) that will be integrated in high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and...


  • bangalore, India Cadence System Design and Analysis Full time

    BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...


  • bangalore, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...


  • Bangalore, India Synopsys Inc Full time

    Job description In this role, you will be creating UVM testbenches for a SoC and IP, as well as tests, regressions, and functional coverage to achieve zero bug escapes. You will interface with the designers to develop the test plans, and from that develop testcases and coverage to thoroughly verify the RTL. Your regressions will grow to cover the...


  • Bangalore, India ACL Digital Full time

    Design Verification Engineer - Senior / Lead / Sr. Lead Job Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification,...


  • Bangalore, India Synopsys Inc Full time

    Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS and EP platforms. You have a proven track record in IP verification and methodology ownership focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders....


  • bangalore, India Synopsys Inc Full time

    Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS and EP platforms. You have a proven track record in IP verification and methodology ownership focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders....


  • Bangalore, India ACL Digital Full time

    Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network...


  • bangalore, India ACL Digital Full time

    Job Title:IP Verification Engineer – UVM verificationExp Level:4+ yrsLocation:Bangalore/HyderabadJob Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...


  • bangalore, India Tenstorrent Full time

    We're looking for a passionate and hands-on RISC-V CPU Cluster/SoC DV Engineer to architect, develop, and evolve world-class verification infrastructure for high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on.This role is hybrid, based out of...