Senior Analog Layout Design Specialist

1 week ago


nagpur, India beBeeLayout Full time

Job Description:We are seeking a highly experienced Analog Layout Engineer to handle the development of high-speed analog chips in advanced TSMC 5nm technology. The successful candidate will operate independently, responsible for delivering complex high-speed analog and mixed-signal layout blocks with minimal supervision.The ideal candidate will have deep technical expertise in chip-level integration, hierarchy, and physical interfaces, as well as hands-on experience with ICC2 and top-level integration flows. Strong understanding of circuit simulation concepts, IP verification, and signoff decks is essential.Key Responsibilities:Handle chip-level planning and integration of high-speed analog IPsPerform complete analog layout design including floorplanning, routing, matching, shielding, EM/IR checks, and parasitic optimizationRun post-layout simulations (extracted netlist, corners, Monte Carlo) and ensure correlation with schematicLead IP verification, including DRC, LVS, ERC, ANT, PEX, and reliability checksDrive complete IP signoff ownership, ensuring zero violations at final GDS deliveryRequired Skills and Qualifications:8+ years of solid experience in Analog/Mixed-Signal LayoutDeep expertise in high-speed IPs (SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks)Strong understanding of chip-level integration, hierarchy, and physical interfacesHands-on experience with ICC2 and top-level integration flowsAbility to run simulations for the blocks being designed (post-layout, extracted)Benefits:Experience working with global customersOpportunity to work on high-speed analog chip development in advanced TSMC 5nm technologyEqual Opportunity Statement:We are committed to diversity and inclusivity.



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