Senior Analog Design Specialist

1 week ago


nagpur, India beBeeAnalog Full time

Job TitleA Senior Analog Layout Engineer is required to design and integrate high-speed analog IPs at the chip level.Lead chip-level planning and integration of high-speed analog IPs.Run post-layout simulations (corners, Monte Carlo, extracted netlist) and ensure correlation with schematic.Required Skills:8+ years of proven experience in Analog/Mixed-Signal Layout.Deep expertise in high-speed IPs: SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks.Strong understanding of chip-level hierarchy, integration, and physical interfaces.Proficiency in Cadence Virtuoso, PVS, Calibre, and extraction tools.In-depth knowledge of DRC/LVS/ERC, PEX & RC Extraction, Signoff decks and reliability checks.Benefits:Experience interfacing with foundry teams for rule clarifications and tape-out signoff.Strong sense of ownership in IP development, customer communications, and documentation.



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