Senior/Lead Asic Verification Engineer

3 months ago


bangalore, India Synopsys Inc Full time

We are looking for experienced Senior/Lead ASIC Verification Engineers for our Bangalore VIP team. Does this sound like a good role for you?


  • Experience : 4yrs to 15 years (multiple roles)
  • Location: Bangalore & Hyderabad & Noida
  • Associated with Verification especially using industry-standard protocols & methodology
  • Languages: Hands-on experience with System Verilog & Verilog. Should have a good understanding of Object Oriented Programming.
  • Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies.
  • Protocol experience: Should have experience on UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol
  • Job responsibilities:
  • Able to contribute to the development of the VIP
  • Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective.
  • Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective


Please share your updated CV to taufiq@synopsys.com or refer who would like to explore this opportunity.

  • Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.

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