Senior Design Verification Engineer

9 hours ago


Greater Bengaluru Area, India ACL Digital Full time

About the Company Be part of a dynamic verification team working on next-gen SoC designs with exposure to complex verification flows and client interaction. About the Role We are looking for a Senior Verification Engineer (SoC / UVM RAL / GLS) to join our team in Bangalore (Hybrid) with 5–8 years of experience. Immediate joiners are preferred. Responsibilities - Hands-on experience with UVM RAL – Register Abstraction Layer. - Strong in SoC-level verification and Gate-Level Simulation (GLS). - Power-aware simulation experience is a must. - Expertise in Register Access Tests – Backdoor, POR, Reg Write/Read. - Good understanding of Register Maps and RAL Integration flow. - Proficient in RAL methods – write, read, peek, poke. - Ability to debug and verify SoC integration scenarios effectively. Qualifications - Education details: 5–8 Years of experience in relevant field. Required Skills - Hands-on experience with UVM RAL. - Strong SoC-level verification skills. - Experience with Gate-Level Simulation (GLS). - Power-aware simulation experience. - Expertise in Register Access Tests. - Good understanding of Register Maps. - Proficient in RAL methods. - Ability to debug and verify SoC integration scenarios. Preferred Skills - Experience with complex verification flows. - Client interaction experience. Pay range and compensation package - Pay range or salary or compensation details not specified. Equal Opportunity Statement We are committed to diversity and inclusivity in our hiring practices.



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