Rtl/firmware Design Engineer – Ai-augmented Hardware Design
2 weeks ago
About Us We are an advanced technology company pioneering the fusion of classical hardware design with modern AI Our systems push the boundaries of performance and automation in edge computing and chip design We believe the future of hardware is AI-assisted and we re building that future now We re looking for a RTL Firmware Design Engineer who thrives at the intersection of traditional hardware development and cutting-edge AI This is a cross-disciplinary role for a designer who can move comfortably between RTL Verilog SystemVerilog VHDL firmware C C Rust and Python-based AI workflows and who is eager to apply Deep Reinforcement Learning and Graph Neural Networks to accelerate RTL design verification and optimization tasks Responsibilities Design and verify via testbenches or FPGA prototypes RTL for custom logic in FPGAs or ASICs Develop embedded firmware in C C or Rust to support hardware functionality and validation Use tools like Cursor and Windsurf to explore RTL design spaces and assist with floorplanning synthesis and physical design optimization Leverage Deep Reinforcement Learning to automate and enhance RTL-related tasks Design and apply Graph Neural Networks GNNs for learning representations of circuits netlists or control data flow graphs Build AI agents using PyTorch Hugging Face and RL libraries such as RLlib Stable-Baselines3 or CleanRL Collaborate with team to develop novel AI-augmented hardware design workflows Contribute to internal tools and libraries that merge ML AI with RTL and firmware workflows Required Qualifications 3 6 years of hands-on experience in RTL design and firmware development Proficiency with Verilog SystemVerilog Experience with embedded software development in C C or Rust Familiarity with FPGA or ASIC development flows including synthesis place and route and timing closure Practical experience using Cursor Windsurf or similar hardware exploration tools Python programming skills and deep knowledge of PyTorch Solid understanding of Deep Reinforcement Learning and hands-on experience with RL frameworks Exposure to Graph Neural Networks GNNs and their application in structured data or graph-based modeling Experience with exposure to Agentic workflows using Crew ai Langflow n8n Autogen or other similar agentic frameworks Experience with RTL simulation frameworks like Verilator or cocotb Nice to Have Experience applying AI ML to EDA problems such as floorplanning verification testbench generation or synthesis optimization Familiarity with ONNX TorchScript or exporting ML models for runtime integration Contributions to open-source ML EDA hardware projects or relevant research publications
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Hyderabad, India Centaurus Technologies and Systems Private Limited Full timeJob SummaryWe are seeking a talented FPGA RTL Design Engineer to design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You’ll work closely with system...
