15h Left: Dft Engineer
4 weeks ago
WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry our communities and the world Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center artificial intelligence PCs gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the worlds most important challenges We strive for execution excellence while being direct humble collaborative and inclusive of diverse perspectives AMD together we advance SENIOR SILICON DESIGN ENGINEER - DFTTHE ROLE As a Senior Silicon Design Engineer you will work with DFT experts and Mentors for DFT Activities such as SCAN ATPG MBIST and DFT RTL Integration etc THE PERSON You have a passion for modern complex processor architecture digital design and verification in general You are a team player who has excellent communication skills You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems KEY RESPONSIBILITIES Design and implement state of the art DFT architecture to meet growing industry demands for efficient test and debug capabilities Generate and Insert DFT structures at the RTL and gate level and verifying correct operation of those structures from RTL to back annotated gates Generate scan inserted netlists produce ATPG patterns to achieve coverage targets and simulate them for correctness Run timing analysis review constraints and waivers analyze violations and work with other teams to fix the design Produce ATE test patterns for MBIST Scan Functional analog testing and support silico ATE testing and debug Participate in diagnostics and failure analysis for customer returns Mentor and lead a team of junior engineers to accomplish all the above tasks within the defined project constraints PREFERRED EXPERIENCE Hands on experience in Inserting Scan and generating ATPG vectors for Stuck-At and At-Speed Faults In-depth experience in analysing and improving scan coverage Hands on experience in MBIST insertion and simulation Experience in Boundary Scan and P1500 Experience in RTL based and netlist-based insertion flows Experience in DFT simulation with and without SDF Experience in Synthesis and formal verification tools Experience in generating TDL for ATE and working closely with ATE team during bring-up phase Good exposure to DFT tools from Mentor Synopsys and Cadence Good scripting knowledge in Perl and TCL SSN knowledge is a plus C knowledge is a plus ACADEMIC CREDENTIALS Bachelors or masters degree in computer engineering Electrical Engineering LI-ST1Benefits offered are described AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services AMD and its subsidiaries are equal opportunity inclusive employers and will consider all applicants without regard to age ancestry color marital status medical condition mental or physical disability national origin race religion political and or third-party affiliation sex pregnancy sexual orientation gender identity military or veteran status or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process
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