Physical Design Methodology Engineer

12 hours ago


Bangalore Karnataka, India Intel Full time

Job Details Conceptualizes documents and designs tools flows and methods TFM for use in the physical design implementation of IPs SoCs and the interaction handoff reuse between IPs and SoCs Establishes regression flows drives improvement in RTL to GDS flows and creates and implements methodologies for improving robustness power performance area and timing for optimizing physical design constraints Develops new physical design techniques through innovative scripts checkers flows and other CAD based automation to simplify and expedite the design process Analyzes retrospective data on current generation quality and efficiency gaps to identify proper incremental evolutionary or transformative changes to the existing physical design related TFM Partners with physical design circuits CAD RTL tool flow owners and third-party vendor teams to continuously improve physical design methodologies and efficiencies Qualifications Minimum Qualifications B E B Tech or M Tech M S Preferred qualifications Requirements listed would be obtained through a combination of industry relevant job experience Job Type Experienced HireShift Shift 1 India Primary Location India BangaloreAdditional Locations Business group Xeon and Networking Engineering XNE focuses on the development and integration of XEON and Networking SOC s and critical IP s sustain Intels Xeon and 5G networking roadmap Posting Statement All qualified applicants will receive consideration for employment without regard to race color religion religious creed sex national origin ancestry age physical or mental disability medical condition genetic information military and veteran status marital status pregnancy gender gender expression gender identity sexual orientation or any other characteristic protected by local law regulation or ordinance Position of Trust N AWork Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site Job posting details such as work model location or time type are subject to change


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