Physical Design and Timing Signoff Methodology, Silicon

**Minimum qualifications**: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 2 years of experience in timing analysis and physical design. - Experience in one or more scripting languages, such as Perl, Tcl, Python. **Preferred qualifications**: - Experience in...

Job DescriptionMinimum qualifications:- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.- 5 years of experience in physical design.- 5 years of experience in static timing analysis, circuit/signoff methodology and simulation.- Experience in one or more sign-off convergence in Static timing analysis (STA)...

Minimum qualifications:Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.5 years of experience in physical design.5 years of experience in static timing analysis, circuit/signoff methodology and simulation.Experience in one or more sign-off convergence in Static timing analysis (STA) electrical checks and...

Minimum qualifications:Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.5 years of experience in physical design.5 years of experience in static timing analysis, circuit/signoff methodology and simulation.Experience in one or more sign-off convergence in Static timing analysis (STA) electrical checks and...

Title: Physical Design EngineerExp: 5+Description:Hands-on experience in full-chip physical design. Strong expertise in EDA tools such as Cadence Innovus, Synopsys ICC2/Fusion Compiler, or equivalent. Proficiency in timing analysis and optimization using tools like PrimeTime. Experience with physical verification tools (e.g., Calibre, ICV) and signoff...

Experience: 3-5 Yrs (3 Positions) - ASIC/SoC design & implementation experience with specific background in the areas of synthesis, SignOff STA - Lower technology nodes like 40nm and below till 14nm/10nm. - Key Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution. - Flow for STA, Crosstalk...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the...

Job DescriptionAs a Silicon Design Engineer in the AMD AECG ASIC TFM (tools Flows Methodology) team, you will work with design experts (FE and BE) to come up with the best implementation methodologies/flows and work on development and support of the FE/BE flows.KEY RESPONSIBILITIES:- Define and drive key Frontend/Beckend/Physical Design methodologies.-...

Leading team of 3-5 Engineers for Block-level implementation Collaborating with cross-functional team for project planning and completion. Contribute to enhancement of methodologies and flow. Overseeing timing closure, power optimization, and physical verification using industry-standard EDA tools Managing resource, schedule to ensure timely and quality...

Leading team of 3-5 Engineers for Block-level implementationCollaborating with cross-functional team for project planning and completion.Contribute to enhancement of methodologies and flow.Overseeing timing closure, power optimization, and physical verification using industry-standard EDA toolsManaging resource, schedule to ensure timely and quality...