TB, Env, Flow owner For DV

Job Description- TB, flow development for GLS , Integrate with RTL DV env- GLS database creation- Unit delay GLS, Power aware GLS, SDF timing based GLS at subsystem and SOC level- Lead : 5+ years exp.- Location: Bengaluru- Experience: 5 - 10 years

Job Requirements Job DescriptionResponsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan...

Responsibilities: Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phase Verification strategy definition along with Verification plan to meet 100% spec to...

Job OverviewWe are seeking a skilled professional to lead the development and implementation of design validation flows.ResponsibilitiesFamiliar with TB architecture, define and implement DV flows to ensure high-quality designs.Develop and execute regression plans to identify and debug failures in the design.Analyze coverage data to identify areas for...

Job Summary Support the Data Risk Governance agenda flowing from the Data Conduct Policy and its related Standards for the Transaction Banking TB business Data Sovereignty Data Quality Records Management Data Privacy AI Ethics Key Responsibilities Strategy To ensure control over data protecting it from unauthorized access and complying with...

Job ID: 36724Location: Bangalore, INArea of interest: OperationsJob type: Regular EmployeeWork style: Office WorkingOpening date: 7 Aug 2025Job SummarySupport the Data Risk & Governance agenda flowing from the Data Conduct Policy and its related Standards for the Transaction Banking (TB) businessData SovereigntyData QualityRecords ManagementData PrivacyAI...

We are hiring a DV Power Management Engineer with 4+ years of experience in PL design, Vivado project flows, and Xilinx/AMD devices. Must be skilled in Linux and scripting (TCL/Shell/Python). Knowledge of RTL coding and Vitis flows is an advantage. Required Candidate profileSeeking a DV Power Management Engineer with 4+ years in PL design, Vivado, and...

Job DescriptionWe are seeking a skilled engineer to work on the development of our Global Logistics System (GLS). The successful candidate will be responsible for developing flow for GLS, integrating with RTL DV environment and creating databases. Key Responsibilities: Developing flow for GLS and integrating it with RTL DV environment Creating databases for...

General Summary:QCT's Bangalore Wireless R&D(WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work...

Responsibilities: Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phase Verification strategy definition along with Verification plan to meet 100% spec to...