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Senior Design Verification Engineer
4 days ago
Design Verification Lead
Under direct supervision, performs engineering work and applied research, development, and design of new Integrated Chips. Work includes Architectural Design, Logic Design, Circuit Design, Physical Design, Verification, Fabrication, Packaging of Chips.
Skills:Block level, full chip verification experience using SV, UVM, RAL, Assertions. Hands on experience in PCIe and memory controllers DDR/NVMe.
Roles and Responsibilities
8yrs of Experience in developing TB & TB components for block level and full chip level verification.
Experience in creating Test plan, writing Test cases
Proficient in System Verilog \Verilog
Proficient in writing Assertions
UVM based Methodology with strong understanding of OOPS concepts
Good knowledge of Digital Fundamentals Good knowledge of Scripting (Perl, Shell), C language
Familiar with different aspects of IP development: micro-architecture, RTL & TB implementation, Test plan, Functional coverage, Code coverage and regression
Strong Simulation & Debugging skills
Strong analytical skills with attention to detail
Excellent written & verbal communications skills.
Knowledge of protocols such as PCI-Express, Rapid IO, NVM Express, NAND,CXL and DDR/ LPDDR
Experience implementing directed and random test cases. Very good leadership skills.
You will be a key player in IP development for Memory/Wired-Interconnect/ Networking/Mobile/ Video
Develop BFMs, Drivers, Monitors and Scoreboard for the test bench in System Verilog.
Mandatory skills
Experience in leading team atleast 5 member team.
Strong hands-on Verification experience in AMBA protocols
Strong hands-on UVM, Assertions, RAL. Testbench flow.
Experience in testbenche development using UVM.
Strong hands-on experience in testbench run automation using make, c-shell or perl scripts
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