Current jobs related to STA engineer - india - QuEST Global Services Pte. Ltd
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STA Engineer
6 days ago
Bengaluru, Karnataka, India, Karnataka MediaTek Full timeSTA EngineerKEY RESPONSIBILITIES: Responsible for Multi Voltage domain STA environment setup, execution and timing closure of GPUDrive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block level HS session and...
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STA Engineer
1 week ago
Bengaluru, Karnataka, India, Karnataka LeadSoc Technologies Pvt Ltd Full timeJob Title: Static Timing Analysis (STA) EngineerJob OverviewWe are looking for a highly skilled Static Timing Analysis (STA) Engineer to join our ASIC/SoC design team. The ideal candidate will be responsible for performing timing analysis, developing constraints, and driving timing closure across multiple design stages. This role requires strong technical...
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Principle/Staff STA Engineer
15 hours ago
Noida, India NXP Semiconductors Full timeJob Description Job Summary We are seeking a highly skilled and experienced Principle/Staff STA Engineer to join our dynamic team in Noida. This role involves leading and executing Static Timing Analysis (STA) for complex SoC designs, ensuring timing closure, and contributing to the development of next-generation semiconductor products. Job Responsibilities...
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STA Synthesis Engineer
2 weeks ago
Bengaluru, Karnataka, India, Karnataka L&T Technology Services Full timeL&T Technology is looking to hire for STA Engineers. Job Location : Bangalore Detailed JD is below ::JD For STA Engineer-6+ ’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with...
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Full Chip STA Lead
4 weeks ago
India eInfochips (An Arrow Company) Full timeFull Chip STA Lead (8+ Years Experience) Locations: Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, Pune Job Description: We are looking for an experienced Full Chip STA Lead with strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and...
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Senior STA Engineer
2 days ago
Bengaluru, Karnataka, India, Karnataka Best NanoTech Full timeJob Title: Senior STA Engineer (Static Timing Analysis)Location: HyderabadExperience: 5+ yearsAbout the Team At [Company Name], we are pushing the boundaries of Moore’s Law. Our silicon powers the world's most advanced [Product Type, e.g., Data Centers/Smartphones]. Our Physical Design team is looking for a timing expert to own the sign-off convergence for...
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Lead Static Timing Analysis
1 week ago
Bengaluru, India Fiori Technology Solutions Inc Full timeJob Description Back Lead Static Timing Analysis (STA) Engineer - Bangalore, India - 10+ - Full-Time We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet...
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Full Chip STA Lead
2 weeks ago
india, IN eInfochips Full timeFull Chip STA Lead (8+ Years Experience)Locations: Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, PuneJob Description: We are looking for an experienced Full Chip STA Lead with strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and...
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Full Chip STA Lead
4 weeks ago
India eInfochips (An Arrow Company) Full timeFull Chip STA Lead (8+ Years Experience)Locations: Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, PuneJob Description: We are looking for an experienced Full Chip STA Lead with strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and...
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Lead/Manager / Director STA Engineer
3 weeks ago
Bengaluru, India SiSoC Semiconductor Technologies Pvt Ltd. Full timeJob Description Company Description SiSoC Semiconductor Technologies is a leading IP and Design services company specializing in high-quality and reliable support across Digital, Analog, and Mixed Signal domains. Our expertise lies in delivering comprehensive design and verification services, including RTL coding, logic partitioning, micro-architecture, FPGA...
STA engineer
4 weeks ago
Quest Global is an organization at the forefront of innovation and one of the world’s fastest growing engineering services firms with deep domain knowledge and recognized expertise in the top OEMs across seven industries. We are a twenty-five-year-old company on a journey to becoming a centenary one, driven by aspiration, hunger and humility. We are looking for humble geniuses, who believe that engineering has the potential to make the impossible, possible; innovators, who are not only inspired by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner for Fortune 500 customers. As a team of remarkably diverse engineers, we recognize that what we are really engineering is a brighter future for us all. If you want to contribute to meaningful work and be part of an organization that truly believes when you win, we all win, and when you fail, we all learn, then we’re eager to hear from you. The achievers and courageous challenge-crushers we seek, have the following characteristics and skills: Roles & Responsibilities: Must have hands-on experience on PNR Suite from Cadence & Synopsys (Innovus & ICC2) Strong experience in Static Timing Analysis (PrimeTime – SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre). Required Skills (Technical Competency): 6+ years of exp in Hands on Chip top and Block level Timing closure. · Netlist and constraint sign in checks and validation. · Timing constraint development at Full chip level and clean up. · Multimode multi corner timing knowledge and timing closure at Top and Block level. · Top level timing closure with sing off STA. Top level ECO implementation strategy development for netlist, RTL and timing level changes. Scripting experience in Perl/TCL · Excellent debugging skills and ability to come up with creative solutions. · Technologies from 28nm and below. · Technical leadership and ability to mentor and make the team deliver. · Having proficiency with either PrimeTime or Tempus is must. Desired Skills: VLSI training certification and working experience with global customers
