
DFT Engineers
3 weeks ago
ATPG DFT Lead Engineers
Experience: 7 to 10 years
Location: Bangalore
Job Description:
· Implementation and verification of DFT architecture and features
· Scan insertion and ATPG pattern generation
· ATPG patterns verification with gate-level simulation
· Test coverage and test cost reduction analysis
· Post silicon support to ensure successful bring up and enhance yield learning
Preferred Experience:
· Understanding of Design for Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
· Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
· Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design
Academic Credentials:
· Bachelors or Masters degree in computer engineering/Electrical Engineering.
Interested please share your updated resume to
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